AMS VERIFICATION ENGINEER
Job description
1. Work with design team to understand the design intent and bring up the verification plans and schedules
2. Develop test environment, test plan, and test cases based on design specification and verification requirements
3. Have a test plan review and verification reviews with the teams at every stage
4. Cooperate with cross-functional teams and coordinate priorities to achieve higher productivity
5. Take dedicated ownership to execute block level and chip level verification
6. Drive the development of behavioral models for analog/MEMS blocks
Qualification
1. MSEE with 5+ years (or PhD with 2+ years) of work experience on verification or analog design for mixed-signal ASIC products
2. Proven teamwork skills
3. Excellent analytical and problem solving skills
4. Excellent oral and written communication skills
5. Knowledge of most common analog circuits schematic
6. Knowledge of schematic entry tools
7. Knowledge of some HDL languages such as Verilog, SystemVerilog, VerilogA/VerilogAMS
8. Experienced with analog and digital simulators such as Spectre, AFS, Xcelium, Questa or VCS
9. Experienced in Real Number Modeling in SystemVerilog or VerilogAMS language for discrete-time behavioral models of analog blocks
10. (nice to have) Experienced with Assertions like PSL or SVA etc
11. (nice to have) Basic knowledge of OVM/UVM/VMM environments and methodology
12. (nice to have), Knowledge of scripting languages like Perl/Python/Tcl
We offer
1. Employment under a contract of employment
2. Possibility of a professional development in an International company
3. Very good working atmosphere
4. A package of additional benefits (LuxMed, insurance, lunch card)
